About the job (Sr. / Staff) Design Verification Engineer
Position Overview :
As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C / C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple to achieve zero-defect with the best and smartest approach to the large verification space.
Requirements :
J-18808-Ljbffr
Design Engineer • Singapore, Pedra Branca, Singapore