One of our US Global Semiconductor IC design is growing their
design teams in Singapore.
Role : Design
Verification Lead (DV)
Location : Singapore
Experience : 10+
years
Requirements : o Expert-level UVM
and SystemVerilog verification
o Advanced
coverage-driven verification methodologies
Experience with complex SoC verification
strategies
o Knowledge of ARM CPU verification
techniques
o Understanding of high-speed
interface verification (PCIe, USB, DDR)
o Formal
verification and assertion-based verification
Verification planning and test strategy
development
o Team leadership and mentoring
capabilities
Responsibilities : o Overall
verification strategy and planning
o Test plan
development and review
o Coverage goals and
sign-off criteria definition
o Verification
environment architecture
o Team coordination and
quality oversight
o Final verification
sign-off
EA licence : 14C7174
www.nuwayglobal.com
Design Lead • Singapore