Senior Engineer - IC Design Verification

Digital IC Design Verification

• Perform front-end verification using UVM methodology
• Work with Systems and Software engineers on FPGA verification
• Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation
• Work with test team in debugging production test issues
• Help debug & correct any functional issues found in taped-out devices
• Participate in design reviews, support ISO processes and documentation

Additional responsibilities

a) Any reasonable task assigned by management and deemed to be within the individuals’ capabilities to ensure smooth running of the business.

b) As this is an evolving business, ongoing change is an integral part of the position. Management will liaise with the individual on any fundamental change to work practices. The individual is required to embrace and adopt any change to working practices.

Knowledge and skill requirements

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