R&D Process Engineer
STATS CHIPPAC MANAGEMENT PTE. LTD.Singapore, SG.01, Singapore10 days ago
Job descriptionDevelop wafer level Molding and debond process capabilities to achieve a good quality and wafer warpage for advanced packaging technologies including 2.5D, fan-out, and SiP Perform DOE planning, continuous improvement, engineering evaluation and analyze experimental data using statistical tools (e.g., JMP) Qualify new materials (direct and indirect), tools, equipment on new package and device qualification. Conduct pre-production process validation and yield stabilization Provide technical support for customer programs Troubleshoot quality issues. Bachelor's degree in Engineering (Mechanical / Materials / Electronics) 3-5years of hands-on experience in process engineering for wafer level molding in semiconductor manufacturing Fundamental understanding of advanced semiconductor fabrication and integration processes Proficiency in preparing technical documentation and delivering presentations Knowledge in molding process : machine, materials, procedures, operations, quality requirements Knowledge of advanced packaging technologies including 2.5D, fan-out, and flip-chip
Purpose of the Job :
- Process development and characterization for R&D projects.
- To lead the development, optimization, and stabilization of wafer level molding and related processes for advanced semiconductor packaging, contributing to mass production readiness, yield improvement, and customer-specific technical solutions.
Key Job Accountabilities :
Review the FMEA, OCAP and Control Plan of new packages to achieve better yield and assembly performance prior and during LVM transition.
Required Experience and Qualifications (Required knowledge, skills and experience however acquired) :
Familiarity with related processes such as debond, warpage adjust, wafer resize.
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Engineer • Singapore, SG.01, Singapore
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