SoC Verification Engineer

Roles & Responsibilities

>Job Responsibilities

1. Perform SoC system‑level and subsystem‑level verification tasks. Lead review of verification strategies, development and execution of verification plans for key modules including DMA, SMMU, clock subsystem, reset system, and chip boot‑up flow.
2. Design and implement overall architecture of SoC subsystem verification testbenches, including hierarchical structure planning, interface definition & connection, and modular packaging of verification components. Ensure high reusability of verification platforms to support verification of different subsystems or similar IPs efficiently. Continuously optimize and maintain the environment to improve verification efficiency and automation.
3. Develop comprehensive test cases covering DMA data transfer, SMMU address translation & page‑table mapping, device access permission, cache coherence, interrupt interaction, clock switching/gating, multi‑domain reset, hardware‑software chip boot‑up and other critical scenarios. Test cases shall cover normal functions, boundary & corner cases, error‑handling scenarios and high‑concurrency stress tests. Drive closure of code coverage and functional coverage.
4. Perform waveform analysis, log debugging and root‑cause analysis for simulation failures, scenario conflicts, data corruption, timing errors, boot‑up failures and abnormal power‑state transitions. Collaborate with design, hardware and software teams for bug fixing and regression closure to ensure functional stability and reliability of the SoC.
5. Establish verification documentation framework. Independently deliver verification plans, test reports, coverage reports and risk assessment reports to ensure traceability, reusability and standardization of the whole verification process.
6. Continuously optimize testbench architecture, simulation performance and automated regression flows, improve iteration efficiency of SoC system verification and support high‑quality project delivery.

Job Requirements

1. Bachelor’s degree or above in Microelectronics, Integrated Circuit, Electronic Information, Computer Science or related disciplines, with minimum 3 years of full‑time working experience in SoC digital verification.
2. Solid understanding of SoC architecture. In‑depth practical knowledge and proven project experience on DMA, SMMU, clock, reset and chip boot‑up principles and verification methodologies.
3. Proficient in SystemVerilog and UVM methodology. Capable of building SoC subsystem testbenches from scratch, implementing component encapsulation, environment reuse and platform iteration.
4. Familiar with bus architectures; hands‑on experience with AXI / AXI‑Stream, APB and other standard bus protocols. Experienced in verification of register configuration, interrupt handling, data transmission, address mapping and other typical scenarios.
5. Hands‑on experience with mainstream EDA tools including VCS / Xcelium, Verdi and coverage‑analysis tools. Strong capability in waveform debugging, issue triage and troubleshooting complex bugs.
6. Practical verification experience on system scenarios such as chip cold boot, warm reboot, abnormal reset, multi‑clock‑domain switching, clock gating and low‑power state transition.
7. Strong logical thinking, high sense of responsibility, good cross‑team communication skills and capability to produce well‑structured technical documentation.

Tell employers what skills you have

Chip Validation
RISC
Microelectronics
Arm Processor
Digital Design
Computerised Systems Validation
bus protocols
Microarchitecture
Software Verification Procedures
Computer Architecture
Hardware Development
System Verilog