IC Verification Engineer - D05 Clementi New Town, Hong Leong Garden, Pasir Panjang, SG

Roles & Responsibilities

Key Responsibilities :

• Develop and implement comprehensive verification plans for IP and SoC levels.
• Architect and build reusable testbenches and verification environments using UVM (Universal Verification Methodology).
• Create directed and constrained-random tests to identify design bugs.
• Develop functional coverage and assertion checks to ensure verification completeness.
• Analyze simulation results, debug test failures, and work with design teams to resolve issues.
• Automate verification flows and regressions using scripting languages.
• Support emulation and FPGA prototyping efforts.

Qualifications and Skills :

Tell employers what skills you have

Perl

Architect

Documentation Skills

Scripting

FPGA

VCS

Python

Ethernet

Flash

VLSI