D02 Anson, Tanjong Pagar, SG

Roles & Responsibilities

About the Role :

We are looking for a highly skilled Senior IC Design Engineer to join our growing team. You will be responsible for driving and leading the full Standard Cell Library Characterization flow, focusing on delivering high-quality timing and power models for advanced nodes. This role requires cross-functional expertise to integrate model output with the digital physical implementation flow (RTL to GDSII), ensuring optimal Power, Performance, and Area (PPA) optimization, successful signoff, and robust functional validation across all advanced semiconductor products.

Key Responsibilities

1. Standard Cell Design & Characterization Leadership

• Lead the full-flow generation and validation of customized characterization libraries (Liberty, noise, power) for advanced technologies.
• Characterize and optimize standard cell performance, focusing on key PPA metrics (timing, power, area, and stability) across multiple PVT corners.
• Utilize industry-standard tools like Siliconsmart and Hspice for transistor-level simulation, model extraction, and quality assurance.
• Develop and enhance automated Python / Tcl / Shell scripting flows for efficient library characterization and signoff.

2. Digital Implementation and Backend Signoff

3. Design Verification and Methodology Integration

How you will stand out :

What you will experience working with us :

Desiwe is committed to providing equal employment opportunities by country, state, and local laws. Desiwe does not discriminate against employees or applicants based on conditions such as race, color, gender identity and / or expression, sexual orientation, marital and / or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union

Tell employers what skills you have

Mentoring

Cell

Leadership

Static Timing Analysis

Autonomy

Modeling

Quality Assurance

Scripting

Routing

Characterization

FPGA

Accountability

ASIC

IC

Physical Design

Electrical Engineering